1. Field of Invention
The present invention relates to a memory. More particularly, the present invention relates to a codec of memory.
2. Description of Related Art
In recent years, since the performance demands for NOR flash memories in the applications, such as consumer electronic products are increasing and the manufacturing process is scaling down, the NOR flash memories face extreme challenges in their reliability. Gradually, the conventional single error correcting codes is no longer sufficient in performance. The NOR flash memories is mainly used to store the control program of a system. In addition to the NOR flash memories are widely used in the Personal Computer (PC) products and consumer electronic products, such as the digital camera, the DVD player, the MP3 music player, the printer, the set top box (DVB-S,-T), and the automobile electronics, etc.
The NOR flash memory features executing in place (XIP), which makes an application program directly operate in the NOR flash memory, instead of reading the codes to the random access memory (RAM). Therefore, the transmission of the NOR flash memory works very efficiently with no need of long boot time.
At first the storage spaces of the NOR flash memory is limited and the writing speed is slow. But because of its high speed in random access, the NOR flash memory mainly targets on the applications of the consumer electronics of the embedded memory, such as the mobile phone and the digital still camera (DSC), and the digital video recorder, etc. Recently, the demands, such as the automobiles electronics, the consumer electronics, the video game consoles (e.g. Nintendo Wii®, XBOX®, Play Station3®, etc.), and the intelligent ammeters are in power, and thus the NOR flash memory plays a more and more important role in the technology industry, especially for the market of automobile, e.g. the digital dashboard, the satellite navigation system, the in-car entertainment systems, the digital TV, and the set top box (STB), etc.
For a memory cell, the bit error rate (BER) of the memory cell is going to be as high as 10−6 and even worse after the manufacturing process reaches 45 nm. However, in the NOR flash applications, the BER should be less than 10−12 for providing enough reliability. As a result, the error correcting codes (ECC) is used for ensuring adequate reliability to meet the specification of the products. Formerly, the single-error-correcting code (SEC), such as Hamming code, can detects two errors and corrects an error of a bit.
However, with the advance of nanoscale manufacturing process, the error correcting capacity of Hamming code is apparently not enough. Even if the Hamming code is replaced by the Bose-Chaudhuri-Hochquenghem (BCH) code, which can correct more than one error bit, the circuitry of BCH code is still too complex to provide the speed of decoding fast enough to keep up with the demands for electronics devices nowadays.
Therefore, there is a need for a new method of fully parallel encoding and decoding, which is used for accelerating the speed of encoding and decoding and simultaneously reduces the complexity of the circuitry.